Non-radiation-hardened processors can function reliably in lunar orbit
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The retrieved literature discusses the use and in-orbit validation of commercial off-the-shelf (COTS) non-radiation-hardened processors in space, but evaluates them strictly within Low Earth Orbit (LEO) environments rather than lunar orbit.
With recent exponential advances in AI-particularly with respect to the tremendous power and efficiency accessible for data processing-there is now a countless array of applications for aerospace missions and space exploration, even in experimental CubeSats. However, with the large volume of data acquisition required for satellite missions, downlinking presents an increasingly expensive bottleneck that drastically reduces mission efficiency. Hence, there is a skyrocketing demand to perform edge computation on board the payload system, often via a graphics processing unit (GPU). Multiple edge-computing CubeSat missions set to operate in Low Earth Orbit (LEO), including the University of Georgia's Multiview Onboard Computational Imager (MOCI), house an Nvidia Jetson TX2i module to perform onboard computer vision. As is the case for many commercial off-the-shelf (COTS) devices used in CubeSats, the TX2i does not come radiation-hardened, and its most vulnerable component is its eMMC disk. Even with the option of radiation shielding, there is nevertheless a possibility of single event effects (SEEs) reaching the TX2i, calling for software-level mitigation as a final line of defense. The MOCI team and partners at Johns Hopkins University's Applied Physics Lab have developed Space Operating Linux (SOL), a minimized Yocto-based operating system with built-in redundancy designed to handle these environmental pressures. While SOL contains patches that enable real-time scheduling in Linux for time-sensitive reliability in flight, the methodologies of operating system minimization, software-based triple modular redundancy in persistent memory with associated bootloader modifications, and a RAM-based file system allow the device to rely less on its eMMC card and render it less prone to radiation-induced damage. Results from proton SEE tests on the device's chip exhibit lower expected error rates in LEO compared to stock devices. Additionally, the devices tested were less prone to permanent failure under a narrower beam than used in previous tests, confirming that peripherals including flash are the highest contributors to critical failures on the TX2i.
As more capable hardware reaches orbit, understanding its performance characteristics is critical for developing novel space applications. Often, radiation-hardened (rad-hard) devices are used for critical missions in the harsh space environment. Rad-hard systems may be replaced in some scenarios with commercial-off-the-shelf (COTS) devices that offer increased performance at the expense of reliability. Many of these devices are based on ARM architectures, including the Cortex-A9, A53, and A72. Interest is also growing around using RISC-V platforms in spaceflight. This research examines the performance of these architectures on a suite of image-processing applications, such as edge detection, image downsampling, and template matching. These applications are compared in terms of execution time, parallel efficiency, and energy consumption. Modern COTS architectures outperform rad-hard devices by over [Formula: see text] speedup. The PowerPC and ARM Cortex-A53 devices demonstrate the best parallel efficiency. While the Cortex-A72 measures the lowest overall energy consumption, the RISC-V and ARM Cortex-A systems are competitive on dynamic energy, and the RISC-V achieves the lowest dynamic power. Parallelism improves performance for onboard processing while reducing overall energy consumption, enabling increased capability. This assessment supports space software developers deploying the latest applications for novel mission requirements.
The adoption of Commercial-Off-The-Shelf (COTS) processors for in-orbit AI is limited by operational reliability risks with limited in-orbit data. This paper reports an in-orbit validation of a heterogeneous architecture combining a Microchip PolarFire SoC and an NVIDIA Jetson Orin NX. In this on-orbit dataset, many observed faults stem from system integration and operational protocol-driven degradation rather than from isolated radiation events. The PolarFire-based system instability aligned with a fragile I/O boot chain at the storage interface rather than the SoC silicon. The Jetson-based system exhibited an end-of-life cascade consistent with cumulative storage degradation under repeated abrupt power cycles. In this paper, the term vulnerability refers to operational reliability failure modes rather than cyber-security exploits. This paper does not assess cyber-security vulnerabilities in open-source or COTS software. The results support a heterogeneous architecture where a resilient Supervisory Node manages recovery actions for a high-performance accelerator.
High-performance processors like the NVIDIA Jetson series are being adopted for AI acceleration in missions like MOCI and SpIRIT [ 10 , 13 ], and are slated for use in next-generation commercial constellations such as Planet’s Pelican fleet to enable real-time, on-board data analysis [ 14 , 15 ]. Meanwhile, reliable, flash-based System-on-Chips (SoCs) like the Microchip PolarFire are favored for dependable supervision in proposed heterogeneous systems like CHICS [ 16 ]. Deploying these COTS components is non-trivial.
The harsh space radiation environment presents a well-understood challenge, where cumulative effects like Total Ionizing Dose (TID) and transient Single-Event Effects (SEEs) can induce performance degradation and operational faults [ 17 ]. A primary contributor to this environment in low Earth orbit is the South Atlantic Anomaly (SAA), a region of unusually high radiation flux. However, beyond this environmental threat, deploying complex COTS systems introduces significant system-level and operational risks that remain poorly characterized by in-orbit data.
Frameworks to address these dependability challenges are an area of active research [ 12 , 18 ], as are methods for onboard anomaly detection [ 19 , 20 , 21 ] and predictive maintenance [ 22 , 23 ]. Fig. 1 Full size image system architecture for the parallel in-orbit evaluation of three independent COTS processing modules. CorrectImg and AttEst are workload names executed on the nodes, not processor names. Fig. 2 Full size image Flight hardware photographs Pioneering missions have successfully demonstrated the feasibility of deploying COTS-based accelerators for specific tasks.
The full scope of the in-orbit campaign, encompassing over 500 individual test runs across 17 distinct test campaigns, is summarized in Table 8 . Table 8 Summary of test campaigns Full size table 4.1 Baseline Performance in Nominal Conditions Under nominal (non-SAA) operating conditions, the performance and reliability data establish a baseline contrast between the APB and IPB. The performance analysis in Table 9 shows that the IPB (mean 53.4 s) is approximately 7.6 \(\times \) faster than the APB (mean 405.6 s), with higher variance (16.6 s vs. 4.6 s standard deviation).
Table 9 Performance analysis in non-SAA conditions Full size table Table 10 Reliability analysis (non-SAA) Full size table 4.2 Impact of the South Atlantic Anomaly The analysis of runs within the South Atlantic Anomaly (SAA), a region of unusually high radiation flux in low Earth orbit, provides key insights into the boards’ environmental resilience. The performance analysis (Table 11 ) shows that mean execution times for both boards remain stable and consistent with their non-SAA performance. The reliability analysis (Table 12 ), however, reveals a significant divergence in behavior. The APB’s reliability is largely unaffected by the SAA, maintaining a high failure rate of 37.5%.
These factors raise risk of filesystem inconsistency and storage wear. The on-orbit dataset does not include kernel-level filesystem diagnostics or NVMe health counters during anomalies, so storage corruption remains a root-cause inference rather than a directly logged event. The main empirical result is the observed reset escalation followed by loss of node availability under this operational protocol. 6 Discussion The in-orbit results reported in this paper address the data gap identified in the introduction. Radiation-induced transient faults remain a mission risk for COTS processors.
A high-performance accelerator like the Jetson can deliver a significant computational speedup ( 7.6 \(\times \) in our case), but its operational complexity introduces a predictable end-of-life degradation pathway. A theoretically reliable supervisor node like the PolarFire SoC can have its resilience completely negated by a single integration flaw. Therefore, a successful architecture must account for both. The role of the resilient supervisor is not just to be a radiation-tolerant backup, but to serve as a system that can reliably overcome the integration faults and manage the predictable failure modes of the high-performance node.
7 Conclusion This paper reported in-orbit performance data from a heterogeneous payload combining a Microchip PolarFire SoC and an NVIDIA Jetson Orin NX. In this on-orbit dataset, many observed instabilities arise from system integration faults in the boot and storage chain and from operational protocol-driven degradation. The results do not rule out radiation-induced faults, but the available telemetry did not show isolated radiation events as the dominant driver of the observed resets. These findings support a heterogeneous architecture where a resilient Supervisory Node manages recovery actions and degradation handling for a high-performance accelerator.
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